For an integrated circuit to function properly, it is necessary that data be loaded into memory elements. One type of integrated circuit which relies on data loaded into memory elements is a programmable logic device (PLD). A PLD is designed to be user-programmable so that users may implement logic designs of their choice. Programmable logic circuits of a PLD comprise gates which are configurable by a user of the circuit to implement a specific circuit design. One type of PLD is the Complex Programmable Logic Device, or CPLD. A CPLD includes two or more “function blocks” connected together and to input/output (I/O) resources by an interconnect switch matrix. Each function block of the CPLD includes a two-level AND/OR structure similar to that used in a Programmable Logic Array (PLA) or a Programmable Array Logic (PAL) device. In some CPLDs, configuration data is stored on-chip in non-volatile memory, then downloaded to volatile memory as part of an initial configuration sequence.
Another type of PLD is a field programmable gate array (FPGA). In a typical FPGA, an array of configurable logic blocks (CLBs) is coupled to programmable input/output blocks (IOBs). The CLBs and IOBs are interconnected by a hierarchy of programmable routing resources. These CLBs, IOBs, and programmable routing resources are customized by loading a configuration bitstream, typically from off-chip memory, into configuration memory cells of the FPGA. For both of these types of programmable logic devices, the functionality of the device is controlled by configuration data bits of a configuration bitstream provided to the device for that purpose.
PLDs also have different “modes” depending on the operations being performed on them. A specific protocol allows a programmable logic device to enter into the appropriate mode. Typical PLDs have internal blocks of configuration memory which specify how each of the programmable cells will emulate the user's logic. During a “program” mode, a configuration bitstream is provided to non-volatile memory, such as a read-only memory (ROM) (e.g., a programmable ROM (PROM), an erasable PROM (EPROM), or an electrically erasable PROM (EEPROM)) either external or internal to the programmable logic device. Each address is typically accessed by specifying its row and column addresses. During system power up of a “startup” mode, the configuration bits are successively loaded from the non-volatile memory into static random access memory (SRAM) configuration latches of a configuration logic block.
Programmable logic devices may also enable multi-boot, or the ability to dynamically reconfigure from multiple design revisions, to allow a user to dynamically switch between different revisions stored in the non-volatile memories. Conventional programmable logic devices allow receiving configuration bitstreams from any of a number of non-volatile memory devices. Although there are many vendors from which to choose, leading to a wider variety of memory densities and types, and more importantly, lower cost and better availability, such a variety of devices has made interfacing with the devices more difficult. Although all vendors' devices generally support similar instructions, they may use different instruction bits for those instructions. That is, they may use different instruction bits to implement the same commands. For example, one SPI Flash vendor may use an 8-bit instruction 00001011 for a read command, while another vendor may use a the bits 11101000 for the same read command. While conventional FPGA devices use variant select pins VS[2:0] to select a predefined 8-bit instruction, the 3-bit variant select command may only be used to select one of eight instructions. With the greater availability of programming devices, such an arrangement for selecting an instruction for accessing data from a memory is unduly restrictive. Further, the greater availability of programming devices also makes multi-boot reconfiguration more difficult.
Accordingly, there is a need for an improved device having programmable logic and method of configuring a device having programmable logic.